ADRV9371-W/PCBZ – AD9371

FII-AD9371 (completely compatible with ADRV9371-W/PCBZ ) are radio cards designed to showcase the AD9371, a high performance wideband integrated RF transceiver intended for use in RF applications such as 4G basestation, test and measurement applications and software defined radios. Transceiver For Use With AD9371, AD9528, ADP5054

The radio cards provide hardware engineers, software engineers and system architects with a single 2×2 transceiver platform for device evaluation and rapid prototyping of radio solutions.

All peripherals necessary for the radio card to operate including a high efficiency switcher only power supply solution, and a high performance clocking solution are populated on the board.

  • Complete Radio Card platform containing AD9371 with:
    • 2 x Transmit outputs
    • 2 x Receive inputs
    • 2 x Observation inputs
    • 1x Sniffer path
  • Narrow tuning range and Wide tuning range options
    • ADRV9371-W/PCBZ matched for 300MHz – 6GHz
  • Complete with high efficiency power supply solution and clocking solution for AD9371
  • FMC connector to Xilinx ZC706 motherboard (EK-Z7-ZC706-G).
  • Powered from single FMC connector
  • Includes schematics, layout, BOM, HDL, drivers and application software
Frequency 300MHz ~ 6GHz
Type Transceiver
Base Part Number ADRV9371
For Use With/Related Products AD9371, AD9528, ADP5054
ADRV9371-W RFIF RFID Features
ADRV9371-W RFIF RFID Features
Datasheets ADRV9371/PCBZ Quick Start Guides
AD9371 Datasheet
AD9371 Software Release Notes

Video File GNU Radio Conference 2016 – Radio Architecture Design Challenges

 

If you have any questions, you can contact us or post in the FII-AD9361 product forums. If you can not register to post, please let us know and I will create a forum username for you.

ADRV9371-N/PCBZ Product Details

The ADRV9371-N/PCBZ and ADRV9371-WPCBZ are radio cards designed to showcase the AD9371, a high performance wideband integrated RF transceiver intended for use in RF applications such as 4G basestation, test and measurement applications and software defined radios.

The radio cards provide hardware engineers, software engineers and system architects with a single 2×2 transceiver platform for device evaluation and rapid prototyping of radio solutions.

All peripherals necessary for the radio card to operate including a high efficiency switcher only power supply solution, and a high performance clocking solution are populated on the board.

Both narrow tuning range and wide tuning range options exist.

The ADRV9371-N/PCBZ is optimized for performance over a narrow tuning range1.8GHz – 2.6GHz. It will exhibit diminished RF performance on tuned RF frequencies outside of this band. This board is primarily intended to provide RF engineers with the ability to connect the AD9371 to an RF test bench (Vector Signal Analyzer, Signal Generator, etc) and achieve its optimum performance.

People who follow the flow that is outlined, have a much better experience with things. However, like many things, documentation is never as complete as it should be. If you have any questions, feel free to ask.

  1. Use the board to better understand the AD9371/AD9375
    1. What you need to get started
    2. Quick Start Guides
      1. Linux on ZC706
      2. Configure a pre-existing SD-Card
      3. Update the old card you received with your hardware
    3. Linux Applications
      1. IIO Scope
        1. AD9371/AD9375 IIO Scope View
        2. AD9371/AD9375 Control IIO Scope Plugin
        3. Advanced AD9371/AD9375 Control IIO Scope Plugin
      2. FRU EEPROM Utility
    4. Push custom data into/out of the AD9371/AD9375
      1. Basic Data files and formats
      2. Stream data into/out of MATLAB
      3. Python Interfaces
  2. Design with the AD9371/AD9375
    1. Understanding the AD9371/AD9375
      1. AD9371 Product page
      2. AD9375 Product page
      3. Full Datasheet and chip design package
      4. MATLAB Filter Wizard / Profile Generator for AD9371
    2. Hardware in the Loop / How to design your own custom BaseBand
      1. GNU Radio
      2. Transceiver Toolbox
    3. Design a custom AD9371/AD9375 based platform
      1. Linux software
        1. AD9371/AD9375 Linux Device Driver
          1. Customizing the devicetree on the target
        2. AD9528 Low Jitter Clock Generator Linux Driver
        3. AD7291 IIO ADC Linux Driver
        4. JESD204B Transmit Linux Driver
          1. JESD204B Status Utility
        5. JESD204B Receive Linux Driver
          1. JESD204B Status Utility
        6. AXI JESD204B GT HDL Linux Driver
          1. JESD204 Eye Scan
        7. AXI ADC HDL Linux Driver
        8. AXI DAC HDL Linux Driver
      2. Changing the VCXO frequency and updating the default RF Transceiver Profile
      3. AD9371/AD9375 No-OS System Level Design Setup
      4. HDL Reference Design which you must use in your FPGA.
      5. Transceiver Toolbox: HDL Targeting with MATLAB and Simulink
  3. Additional Documentation about SDR Signal Chains – The math behind the RF
  4. Help and Support

AD9371 Prototyping Platforms

ADRV9371-N/PCBZ and ADRV9371-W/PCBZ Prototyping Platforms using the AD9371 Integrated, Dual RF Transceiver with Observation Path

Analog Devices Inc.

The ADRV9371-W/PRBZ, ADRV9371-N/PCBZ are FMC radio cards for the AD9371, a highly integrated RF Transceiver™. While the complete chip level design package can be found on the ADI web site, information on the card and how to use it, the design package that surrounds it, and the software which can make it work can be found here.

Prerequisites for AD9371 based boards

What you need, depends on what you are trying to do. As a minimum, you need to start out with:

  1. The AD9371 based card.
  2. A carrier platform. ADI does not offer these boards for sale or loan, getting one yourself is normal part of development or evaluation of the AD9371. Our recommended carriers (the ones we use all the time) are either:
    • The Xilinx ZC706. The fabric on this device is much larger, and if you are looking at targeting – this is the recommended option.
    • There are a few more boards, which do work, but are currently not yet supported. The experience of the fabric only solutions is very close to the ARM/FPGA SoC based solutions, but the GUI runs on a host PC (Windows or Linux).
    • Supported Carriers

      The ADRV9371/PCBZ is, by definition a “FPGA mezzanine card” (FMC), that means it needs a carrier to plug into. The carriers we support are:

      Board ADRV9371-N/PCBZ ADRV9371-W/PCBZ ADRV9375-N/PCBZ
      ZCU102
      KCU105
      ZC706
      Arria 10 SoC
      Arria 10 GX
      18 May 2016 21:30 · mhennerich
  3. some way to interact with the platform,
    1. for the ARM/FPGA SoC platforms, this normally includes:
      • HDMI monitor (1080p is best) or VGA Monitor
      • USB Keyboard
      • USB Mouse
    2. for the FPGA only solutions, this includes:
      • LAN cable (Ethernet)
      • Host PC (Windows or Linux)
  4. Internet connection (without proxies makes things much easier) to update the scripts/binaries on the SD Card that came with the ADI FMC Card. (Firewalls are OK, proxies make things a pain).
  5. RF Test equipment

RISC-V FPGA Development Board

FII-PRX100 Risc-V FPGA Board is a ready-to-use development platform designed around the Field Programmable Gate Array (FPGA) from Xilinx.

Open Source[edit]

There are many open-sourced RISC-V CPU designs, including:

  • The Berkeley CPUs. These are implemented in a unique hardware design language, Chisel, and some are named for famous train engines:
    • 64-bit Rocket. Rocket may suit compact, low-power intermediate computers such as personal devices. Named for Stephenson’s Rocket.
    • The 64-bit Berkeley Out of Order Machine (BOOM). BOOM uses much of the infrastructure created for Rocket, and may be usable for personal, supercomputer, and warehouse-scale computers.
    • Five 32-bit Sodor CPU designs from Berkeley, designed for student projects. Sodor is the fictional island of trains in childrens’ stories about Thomas the Tank Engine.
  • picorv32 by Claire Wolf, a 32-bit microcontroller unit (MCU) class RV32IMC implementation in Verilog.
  • scr1 from Syntacore,a 32-bit microcontroller unit (MCU) class RV32IMC implementation in Verilog.
  • PULPino (Riscy and Zero-Riscy) from ETH Zürich / University of Bologna. The cores in PULPino implement a simple RV32IMC ISA for micro-controllers (Zero-Riscy) or a more powerful RV32IMFC ISA with custom DSP extensions for embedded signal processing.

It was designed to cover all aspects of FPGA Development and Experiment, RISC-V SOC .

The main application areas aim at smart home, Wearable, sensor Fusion, IOT, and industrial control etc.

FII-PRX100 Risc-V FPGA Board is a ready-to-use development platform designed around the Field Programmable Gate Array (FPGA) from Xilinx.  It was designed to cover all aspects of FPGA Development and Experiment, RISC-V SOC .  The main application areas aim at smart home, Wearable, sensor Fusion, IOT, and industrial control etc.

Features:

  1. Fully supports the RV32IMFAC instruction architecture and provides a rich set of storage and interfaces, including: ITCM 64K(Instruction Tightly Coupled Memories) and DTCM 64K(Data Tightly Coupled Memories) for separate storage of instructions and data, and 2M bytes External super RAM support as well .
  2. 3-stage pipeline architecture
  3. support machine mode only
  4. From instruction fetch ,Decoder ,Execution to memory operation modules are 100% Manually developed by using pure verilog HDL, scalable and easy to be understood.
  5.  The flexible RISC-V IPCORE is suitable for customized ASIC for specific domain, Also can be used as embedded CPU with in FPGA.
  6.  Interrupt controller, supports 16 high-priority, low-latency local vectored interrupts.
  1. includes a RISC-V standard PLIC (platform-level interrupt controller ), which supports 127 global interrupts with 7 priority levels. provides the standard RISCV machine-mode timer and software interrupts via the CLINT(Core Local Interruptor)
  2. 2 UART
  3. 3 QSPI
  4. I2C
  5. 3 PWM
  6. 10M/100M/1G ethernet
  7. Watchdog
  8. 32 GPIO
  9. 4 7-seg display interface
  10. External Serial Flash
  11. Debug Interfaces: JTAG
  12. 12-Bit ADC
  13. Four data lines I2S and can support maximum of 8 audio outputs or 4 stereo channels
  14. Hardware Crypto Engine for Advanced Fast Security, Including: AES 128, CRC, Checksum etc

FII-PRX100 RISC-V development board

      1. Suitable for FPGA study and training
      2. Fully support FIE310 CPU running and system development
      3. Suitable for user customized RV32G verification and validation
      4. JTAG interface for FPGA and FIE310 CPU download and debug
      5. Support Windows software and linux development environment
      6. GCC compilation toolchain and graphical software development environment
      7. Hardware resource: Switchs, Push Button ,USB to UART convertorQSPI flash, I2CEEPROM, 100M/1G ethernet,USB keyboard mouse,GPIOhdmi transmitter and camera etc.

1.System Design Objective

The main purpose of this system design is to complete FPGA learning, development and experiment with Xilinx-Vivado. The main device uses the Xilinx-XC7A100T-2FGG676I and is currently the latest generation of FPGA devices from Xilinx. The main learning and development projects can be completed as follows:

      1. Basic FPGA design training
      2. Construction and training of the SOPC (Microblaze) system
      3. IC design and verification, the system provides hardware design, simulation and verification of RISC-V CPU
      4. Development and application based on RISC-V
      5. The system is specifically optimized for hardware design for RISC-V system applications.

2.System Resource

      1. Extended memory
      2. Use two Super Srams in parallel to form a 32-bit data interface with a maximum access space of 1M bytes.
      3. IS61WV25616 (2 pieces) 256K x 32bit
      4. Serial flash
      5. Spi interface serial flash (128M bytes)
      6. Serial EEPROM
      7. Gigabit Ethernet: 100/1000 Mbps
      8. USB to serial interface: USB-UART bridge

3.Human-computer Interaction Interface

      1. 8 toggle switches
      2. 8 push buttons
      3. Definition of 7 push buttons: up, down, left, right, ok, menu, return
      4. 1 for rest: Reset button
      5. 8 LEDs
      6. 6 7-segment decoders
      7. I2C bus interface
      8. UART external interface
      9. JTAG programming interfaces
      10. Integrated FPGA Jtag and Risc-V Jtag by using single USB port.
      11. Built-in RISC-V IPCore
      12. CPU software debugger, no external RISC-V JTAG emulator required
      13. 12-pin GPIO connectors, in line with PMOD interface compatible.

 

Software Development System

    1. Vivado 18.1 and later version for FPGA development, Microblaze SOPC
    2. Freedom Studio-Win_x86_64 Software development for RISC-V CPU

5.  Supporting Resources

    1. RISC-V  JTAG Debugger
    2. Xilinx Altera JTAG Download Debugger
    3. FII-PRX100 Development Guide

What is RISC-V Foundation?

RISC-V  is a free and open ISA enabling a new era of processor innovation through open standard collaboration.

The RISC- V Foundation is a non-profit entity serving members and the industry and was originally developed in the Computer Science Division of the EECS Department at the University of California, Berkeley.

Recently RISC-V and GigaDevice announced the GD32V Series, which is said to be the world’s first 32-bit general-purpose microcontroller based on the RISC-V core.

Perf-V is a FPGA demo board designed for RISC-V opensource community by PerfXLab. It integrates various peripheral chips and offers many interfaces.

  • It uses Xilinx Artix-7 FPGA, Vivado software development,and is designed for the RISC-V open source community and FPGA learning enthusiasts design development board.
  • It Integrates a variety of peripheral chips to provide a rich set of peripheral interfaces, including PMOD, Arduino, JTAG, UART interfaces, and high-speed interfaces for expansion of HDMI, VGA, USB2.0/3.0, camera, Bluetooth, expansion boards, etc. Strong flexibility.
  • Based on Perf-V’s self-developed smart car, it can use mobile phone Bluetooth to control the movement of the car, and can realize automatic tracing and obstacle avoidance functions.

You can also choose another one with the chip XC7A100T-1FTG256C, which has more logic cells and CLBs.

What is the next board are you expecting? Please feel to let us know in the forum: New Product Ideas. We will carefully listen to and take action!

 

FPGA for Beginners

field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence the term “field-programmable”.

The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an Application-Specific Integrated Circuit (ASIC). Circuit diagrams were previously used to specify the configuration, but this is increasingly rare due to the advent of electronic design automation tools.

pocket FPGA study Boards
pocket FPGA study Boards

FII was founded on making FPGA technology more approachable for students or FPGA beginners to learn. We partnered with the world leader and founder of modern day FPGA technology, Altera and Xilinx, to create platforms that were ideally suited for learning.

Below are boards that we recommend for beginning users. These boards have course material, books, and tutorials to get you started!

Altera FPGA Study Board, Verilog for beginner – Cyclone-10 FPGA Development Board – $59

 

FPGA Board for beginner with free experimental manuals
FPGA Board for beginner with free experimental manuals

 

The advantage of FPGA beginner study board:

  1. Beginner FPGA study board, cheaper but fully functional. cellphone sized. ( < 80 USD )
  2. power supply and download at the same time, no extra power supply and no extra data transfer line needed
  3. Small volume and light and can be put into your pocket. size: 10cm X 7 cm.
  4. Unique function: can be a study board as well a multifunctional JTAG downloader. 
  5. We use newest version Intel FPGA within two years and you can always keep in the front of FPGA industry.
cyclone10
cyclone10

FII-PRA006 is both a FPGA development board and a JTAG down-loader.  As a JTAG down-loader, It support:

  1. Intel(Altera) FPGA:Support Quartus II5.0 and all the version afterwords;
  2. Xilinx FPGASupport ISE9.0 and all version afterwords or All Vivado versions;
  3. Compatible with ARM Cortext:Support OpenOCD
  4. RISC-V CPU:Support FreeDomStudio,including GCC、OpenOCD、and GDB Debugging

Altera FPGA Study Board Hardware Resources:

  1. seven_seg_r
  2. VGA Video Interface × 1
  3. 1G Ethernet Interface × 1
  4. I2C EEPROM × 1
  5. DIP Switch × 8
  6. Controllable  LED light × 8
  7. Photoresistance × 1
  8. Thermistor × 1
  9. Adjustable Varistor × 1
  10. Buttons × 4
  11. GPIO Interface × 2
  12. Micro usb Interface(Power Supply and downlaod ) × 1
  13. SPI Communication Interface × 1
  14. AD/DA Conversion chip × 1
  15. JTAG Download Interface × 1
  16. FLASH 32Mbit  × 1
Chip Resources
Chip Resources
FPGA Study Board
FPGA Study Board

The Biggest Hardware Benefits:

    1. USB port for power supply, downloader, communications ;
    2. One 50M Oscillator. A stable clock for development board;
    3. 6-digit common anode digital tube,display the data by dynamic scan;
    4. 1 VGA port to display picture and video;
    5. 1 I2C port EEPROM chip,Model: AT24C02;
    6. 1 adaptive 10M, 100M/1000M Ethernet port;
    7. 5 buttons,4 for programmable buttons , and one button for resetting;
    8. 1 Photoresistance. It can be used for simulating light control;
    9. 1 thermistor. It can be used for collecting temperature or simulating alarm function
    10. An adjustable resistor can simulate voltage changes, etc.
    11. 1 PCF8591 AD/DA Conversion chip;
    12. 8-digit dial switch;
    13. 8-bit LED light-emitting diode;
    14. One 128Mbit Flash Chip;
    15. 2 GPIO external port for communication extension port ;
    16. One JTAGPort , and make PRA006/010 a functional JTAG down-loader, can be used as a JTAG downloader for Intel,Xilinx and other FPGA downloadable program;

It can also be used with other FPGA development Boards:

FPGA for Beginner Boards Work with other Boards
FPGA for Beginner Boards Work Together with other Boards
Easily Work With Other Boards
Easily Work With Other Boards

 

FPGA Board For Beginner with free Experimental Manuals
FPGA Board For Beginner with free Experimental Manuals
FPGA Board For Beginner with free Experimental Manuals and Jtag downloader
FPGA Board For Beginner with free Experimental Manuals and embeded Jtag downloader
Buy FPGA Boards

Official Shopping Websites

https://fpgamarketing.com/Altera-FPGA-Study-Board-Verilog-for-beginner-Cyclone-10-FPGA-FII-PRA006.htm

FPGA for Beginner Tutorial – FPGA Experimental Manuals

  • FPGA Board for beginner – FII-PRA006/010 Hardware Reference Guide
  • FPGA Beginner Tutorial – Ethernet Experiment – FPGA Board for Beginner – Experiment 14
  • FPGA Beginner Tutorial – VGA Experiment – FPGA Board for Beginner – Experiment 13
  • FPGA Beginner Tutorial – AD, DA Experiment – FPGA Board for Beginner – Experiment 12
  • FPGA Beginner Tutorial – IIC Protocol Transmission – FPGA Board for Beginner – Experiment 11
  • FPGA Tutorial – Asynchronous Serial Port Design and Experiment – FPGA for Beginner – Experiment 10
  • FPGA Tutorial – Use Dual-port RAM to Read and Write Frame Data – FPGA Board for Beginner – Experiment 9
  • FPGA Tutorial – Use of ROM (Read-only Memory) – FPGA Board for Beginner – Experiment 8
  • FPGA Tutorial – Hexadecimal Numbers to BCD Code Conversion and Application – FPGA Board for Beginner – Experiment 7
  • FPGA Tutorial – Use Multiplier and ModelSim – FPGA Board for Beginner – Experiment 6
  • FPGA tutorial – Block_debouncing – FBGA Board for for beginner – Experiment 5
  • FPGA Tutorial – Block/ Schematic Test – FPGA Board for Beginner – Experiment 4
  • FPGA for Beginner Tutorial – Experiment 3 – BCD_counter – FII-PRA006
  • FPGA for Beginner Tutorial – Experiment 2 Switch and Use SignalTap II – FII-PRA006
  • FPGA Board Beginner Tutorial – FII-PRA006 Experiment 1 LED_shifting

FPGAs provide benefits to designers of many types of electronic equipment, ranging from IOT, smart homes, smart energy grids, aircraft navigation, automotive driver’s assistance, medical ultrasounds and data center search engines, and so on.

We will send you experimental manuals when you have bought our pocket study board. PRA006 or PRA010

What is FPGA?

FPGA stands for “Field Programmable Gate Array“. As you may already know, FPGA essentially is a huge array of gates which can be programmed and reconfigured any time anywhere. “Huge array of gates” is an oversimplified description of FPGA. FPGA is indeed much more complex than a simple array of gates.

Some FPGAs has built-in hard blocks such as Memory controllers, high-speed communication interfaces, PCIe Endpoints, etc. But the point is, there are a lot of gates inside the FPGA which can be arbitrarily connected together to make a circuit of your choice. More or less like connecting individual logic gate ICs (again oversimplified but a good mental picture nonetheless).

FPGAs are manufactured by companies like Xilinx, Altera, Microsemi, etc… FPGAs are fundamentally similar to CPLDs but CPLDs are very small in size and capability compared to FPGAs.

What are the applications of FPGA? 

Architecturally FPGAs are essentially a sea of gates which can be reconfigured to build almost any digital circuit that one can imagine.

This great flexibility along with the ability to reconfigure the device with different designs at-will makes FPGA a better choice compared to ASICs (Application Specific Integrated Circuit) for a lot of applications. For example, deep learning, AI or application acceleration system can re-program a single FPGA with different algorithms at different times to achieve the best performance. An ASIC would not be as flexible in such situations.

In certain applications, the number of individual units manufactured would be very small. Designing and manufacturing ASICs for these applications can be prohibitively expensive. In such situations, FPGA can offer very cost effective but robust solutions. The module form-factor boards such as the Narvi Spartan 7 FPGA Module make it easier to implement the applications without requiring end-product designers to take care of complex details such as FPGA power supplies, DDR3 routing, etc. Below are some of the potential applications of FPGAs in no particular order.

    • Cryptography
    • ASIC prototyping
    • Industrial, medical and Scientific Instruments
    • Audio/Video and Image processing and broadcasting
    • High-performance computing, AI, and Deep Learning
    • Military and Space applications
    • Networking, packet processing, and other communications

What is FPGA programming? 

FPGA programming or FPGA development process is the process of planning, designing and implementing a solution on FPGA. The amount and type of planning vary from application to application. But creating a requirements document that captures all specific requirements and creating a design document that explains how the proposed solution would be implemented can be very helpful to enumerate potential problems and plan around them. A little bit of time spent creating a quality design document will save tons of time in refactoring, debugging and bug fixing later. Implementing a solution on FPGA includes building the design using one of the design entry methods such as schematics or HDL code such as Verilog or VHDL, Synthesizing the design (Synthesis, netlist generation, place and route etc..) in to output files that FPGAs can understand and program the output file to the physical FPGA device using programming tools. Entering the design using schematics is not used in the industry widely anymore. So we will keep the discussion limited to design entry using HDL (Hardware Description Language), specifically Verilog in this article series. Synthesis and programming are almost completely taken care of the vendor tools such as ISE and Vivado and Numato Lab configuration tools. All necessary steps to be taken by the user as part of design entry, synthesis and programming will be explained in subsequent sections.

 

The Benefits of FPGA

Flexibility

  1. FPGA functionality can change upon every power-up of the device. So, when a design engineer wants to make a change, they can simply download a new configuration file into the device and try out the change.
  2. Often, changes can be made to the FPGA without making costly PC board changes.
  3. ASSPs and ASICs have fixed hardware functionality that can’t be changed without great cost and time.

Acceleration

  1. FPGAs are sold “off the shelf” vs. ASICs (which require manufacturing cycles taking many months).
  2. Because of FPGA flexibility, OEMs can ship systems as soon as the design is working and tested.
  3. FPGAs provide off-load and acceleration functions to CPUs, effectively speeding up the entire system performance.

Integration

Today’s FPGAs include on-die processors, transceiver I/O’s at 28 Gbps (or faster), RAM blocks, DSP engines, and more. More functions within the FPGA mean fewer devices on the circuit board, increasing reliability by reducing the number of device failures.

Total Cost of Ownership (TCO)

  1. While ASICs may cost less per unit than an equivalent FPGA, building them requires a non-recurring expense (NRE), expensive software tools, specialized design teams, and long manufacturing cycles.
  2. Intel FPGAs support long lifecycles (15-years or more), avoiding the cost of redesigning and requalifying OEM production equipment if one of the electronic devices on-board goes end of life (EOL).
  3. FPGAs reduce risk, allowing prototype systems to ship to customers for field trials, while still providing the ability to make changes quickly before ramping to volume production.

 

The concept behind an FPGA’s programmability is a basic building block containing various logic types that are connected and interconnected to perform any logic function. “Basic building block” is a generic term that I’m using, but you may hear terms like “logic cells,” “combinational logic blocks” (CLBs), or “logic array blocks” (LABs); it depends on the manufacturer. The basic building block contains logic resources and is the starting point that the FPGA uses to constructs the design.

The experimental manual of FII-PRA006 pocket Board for beginners

The Hardware Configuration of FII-PRA006 Board for beginners

The Schematic Diagram of FII-PRA006 FPGA Board for beginners

We will send you above documents after you have bought our PRA006 pocket study board.

 

Extension Experiments

 

Video Camera

  1. Pictures and Videos Collection
  2. Edge check and human-face location Positioning
  3. Picture and video Zip and UnZip

Voice and Speech

  1. voice and speech collection
  2. Speech Recognition
  3. High Speed Analog signal acquisition

Risc-V

  1. Low level CPU programing
  2. Run C language
  3. C language  debugging onboard device

 

AD-FMCOMMS3-EBZ Board $379 Compatible FII- BD9361

AD-FMCOMMS3-EBZ Board $379 Compatible FII- BD9361
AD-FMCOMMS3-EBZ Board $379 Compatible FII- BD9361

FII-BD9361 –  Perfectly compatible with AD-FMCOMMS3-EBZ – Code compatible, development tool compatible, performance compatible, Smaller size and more space saving

– AD9361 Software Development Kit using the AD9361 RF Agile Transceiver

The FII-BD9361 is a high-speed analog module designed to showcase the AD9361, a high performance, highly integrated RF transceiver intended for use in RF applications, such as 3G and 4G base station and test equipment applications, and software defined radios. Its program-ability and wide-band capability make it ideal for a broad range of transceiver applications. The device combines an RF front end with a flexible mixed-signal base-band section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor or FPGA.

The AD9361 chip operates in the 70 MHz to 6 GHz range, covering most licensed and unlicensed bands. The chip supports channel bandwidths from less than 200 kHz to 56 MHz by changing sample rate, digital filters, and decimation, which re all programmable within the AD9361 itself.

Overview

The AD-FMCOMMS2-EBZ is a high-speed analog module designed to showcase the AD9361, a high performance, highly integrated RF transceiver intended for use in RF applications, such as 3G and 4G base station and test equipment applications, and software defined radios. Its programmability and wideband capability make it ideal for a broad range of transceiver applications. The device combines an RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor or FPGA. The AD9361 chip operates in the 70 MHz to 6 GHz range, covering most licensed and unlicensed bands.

The AD-FMCOMMS2-EBZ board comes specifically tuned and optimized to 2.4 GHz and due to the limitations of the on-board discrete external components, it may exhibit diminished RF performance on some other programmed configurations. The chip supports channel bandwidths from less than 200 kHz to 56 MHz by changing sample rate, digital filters, and decimation, all programmable within the AD9361 itself.

The AD-FMCOMMS2-EBZ provides RF engineers the ability to connect the AD9361 to a RF testbench (Vector Signal Analyzer, Signal generator, etc) and measure performance. The external components (which can easily be swapped) on the AD-FMCOMMS2-EBZ have a narrower RF tuning range 2400 – 2500 MHz. It is expected that most engineers will change these external components (pin for pin replacements from various vendors are available) for their specific application/frequency of interest

Key Applications: General purpose design suitable for any software-designed radio application, MIMO radio, Point to point communication systems, Femtocell/picocell/microcell base stations, WiFi, ISM

Features

  • Software tunable across wide frequency range (70 MHz to 6.0 GHz) with a channel bandwidth of Phase and frequency synchronization on both transmit and receive pathsAllows high channel density
  • Powered from single FMC connector
  • Supports MIMO radio, with less than 1 sample sync on both ADC and DAC
  • Includes schematics, layout, BOM, HDL, Linux drivers and application software
  • Supports add on cards for spectrum specific designs (PA, LNA, etc.)

Ships With

  • AD-FMCOMMS2-EBZ Evaluation Board

FII-BD9361 Features and Benefits

  1. Software tunable across wide frequency range : TX :47 MHz to 6 GHz RX:70 MHz to 6 GHz

  2. Software tunable bandwidth200 kHz to 56 MHz.

  3. Software tunable TX Power and RX Dynamic Range:TX>80dB RX>70dB

  4. Powered up from single standard FMC connector

  5. Supports MIMO radio,2 ways TX and 2 ways RXMax 4T4R by RF Switches configuration

  6. Supports FII-7030 and other standard FMC Connector Platform software radio application

  7. TX Power higher, Broadband flatness is better.

II-BD9361 Product Details – Completely Compatible with AD-FMCOMMS3-EBZ Board

  1. The FII-BD9361 is a high-speed analog module designed to showcase the AD9361, a high performance, highly integrated RF transceiver intended for use in RF applications, such as 3G and 4G base station and test equipment applications, and software defined radios. Its programmability and wideband capability make it ideal for a broad range of transceiver applications.

  2. The device combines an RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor or FPGA. The AD9361 chip operates in the 70 MHz to 6 GHz range, covering most licensed and unlicensed bands. The chip supports channel bandwidths from less than 200 kHz to 56 MHz by changing sample rate, digital filters, and decimation, which are all programmable.

FII-BD9361 Interface:

Digital Interface:FMC-LPC
RF Interface: Four Way Differential Transceiver

FII-BD9361 Features

We support all features of AD-FMCOMMS3-EBZ such as:

TX band: 47 MHz to 6.0 GHz
RX band: 70 MHz to 6.0 GHz
Bandwidth Adjustment Range: 200 kHz to 56 MHz
Low noise figure: 2dB NF(noise figure/800MHz )
LO ,RX Gain Control,AGC
2.4Hhz local oscillator (LO) step
For more information, please check ad9361 introduction.

 

FII-BD9361 Applications

      1. General purpose design  for any software-designed radio application
      2. MIMO radio
      3. Point to point communication systems
      4. Femtocell/picocell/microcell base stations
      5. USRP
      6. 3G/4G signal and protocol analysis
      7. WiFi
      8. ISM

3. Compatible Boards

AD-FMCOMMS3-EBZ  (FII-BD9361 the same as )

(https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms3-ebz.html#eb-overview)

4. Support Boards

ZC702
ZC706
Zedboard
FII-PE7030

5. User Guide : (FII-BD9361 can use it )

https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms3-ebz

FII-BD9361 is developed by Fraser Innovation INC. It is absolutely compatible with AD-FMComms3-EBZ Board. The purpose of the AD-FMComms3-EBZ is to provide an RF platform to software developers, system architects, etc, who want a single platform which operates over a much wider tuning range (70 MHz – 6 GHz). It’s expected that the RF performance of this platform can meet the datasheet specifications at 2.4 GHz, but not at the entire RF tuning range that the board supports (but it will work much better than the AD-FMCOMMS2-EBZ over the complete RF frequency). We will provide typical performance data for the entire range (70 MHz – 6 GHz) which is supported by the platform.

This is primarily for system investigation and bring up of various waveforms from a software team before their custom hardware is complete, where they want to see waveforms, but are not concerned about the last 1dB or 1% EVM of performance.

You can find the user guide in above link at analog website. We will send you hardware configuration and system Scheme Diagram when you purchase this products.